ULL PCIe DMA Controller
The Future of Efficient Data Transfer is Here!
Boost Your Data Transfer Speed with Orthogone!
Speed. Efficiency. Reliability.
The ULL PCIe DMA Controller enables ultra-fast data transfer in both directions between the host CPU and FPGA via a PCIe interface.
With a round-trip time of less than 640ns, this IP core offers numerous build-time parameters, effortless integration with FPGA logic, and a comprehensive software development kit.
User-friendly for software developers building low-latency network streaming applications. Easy to integrate with standard PCIe endpoint and other Orthogone ULL products.
Facing challenges with data transfer in electronic trading and HPC?
Download our product brief to unleash the potential of ultra-low latency bidirectional data transfer.
Key Features and Benefits
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Highly parametrizable IP Core
- Number of channels
- Number of queues per channel
- Memory size of each queue
- Interfaces AXI-4 Stream bus width and synchronous or asynchronous to PCIe clock
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Seamless integration
- Fully integrated with AMD/Xilinx PCIe Endpoint (up to Gen 4 x8)
- Easy integration with Orthogone TCP/IP and UDP/IP network stacks
- Standard AXI-4 streaming interfaces for seamless integration with FPGA logic
- Highly efficient FPGA implementation with low resource utilization
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Benefits
- Best in-class latency and throughput performances
- Custom multi-channel Circular Buffer DMA (CBDMA) architecture specifically designed for ULL applications
- Easy to integrate with standard PCIe endpoint (gen. 3, gen. 4)
- Full Kernel bypass implementation resulting in extremely low latency and jitter
- High-quality verification based on the UVM environment
Get ready to experience lightning-fast, bidirectional data transfer with our ULL PCIe DMA Controller.
Unlock its full potential now. Let our experts show you the way!